Fig. 5.2 shows the block schematic of timer. It consists of three input signals, one output signal and three units: Charging unit, Comparator and Output unit.
The charging unit consists of RC circuit as shown in the fig. 5.3.
It is associated with trigger input. The trigger input is activated by pressing switch (Push to ON). Pressing the switch momentarily the capacitor can be discharged completely so that voltage across capacitor can be made zero volt. Immediately after the switch is released capacitor starts charging through resistance R, with time constant RC.
The voltage across capacitor is applied to the +ve input of the comparator. The comparator compares this voltage with reference voltage applied at the reference input.
When the voltage across capacitor is greater than reference voltage; output is low (Complement of output comes from output unit means Q complement); otherwise output is high.
Immediately after trigger, output jumps to its high level and remains high until capacitor charges above level of reference voltage, as shown in the figure 5.4.
The time period for which output remains high is controlled by adjusting time constant RC. The reset input to the timer is used to interrupt the timing interval and to reset the outputs.